Gate EE-2013 Question Paper With Solutions

Q. 35 In the circuit shown below,Gate EE-2013 Question Paper With Solutions  has negligible collector-to-emitter saturation voltage and the diode drops negligible voltage across it under forward bias. If Gate EE-2013 Question Paper With Solutions is +5 V, X and Y are digital signals with 0 V as logic 0 and Gate EE-2013 Question Paper With SolutionsVcc as logic 1, then the Boolean expression for Z is Gate EE-2013 Question Paper With SolutionsGate EE-2013 Question Paper With Solutions Answer:(B)

Explanation:
Gate EE-2013 Question Paper With SolutionsGate EE-2013 Question Paper With Solutions

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