Q.27 Assume that all the digital gates in the circuit shown in the figure are ideal, the resistor 
and the supply voltage is 5 V. The D flip-flops 
and 
are initialized with logic values, 0, 1, 0, 1 and 0, respectively. The clock has a 30% duty cycle.
The average power dissipated (in mW) in the resistor R is _____
Answer: (1.5)
Explanation:
