Q. 17 In the figure shown, the output Y is required to be 
. The gates G1 and G2 must be, respectively,
(A) NOR, OR
(B) OR, NAND
(C) NAND, OR
(D) AND, NAND
Answer: (A)
Explanation:
Q. 17 In the figure shown, the output Y is required to be . The gates G1 and G2 must be, respectively,
(A) NOR, OR
(B) OR, NAND
(C) NAND, OR
(D) AND, NAND
Answer: (A)
Explanation:
