Q. 15 A 32 – bit wide main memory unit with a capacity of 1 GB is built using 256M X 4-bit DRAM chips. The number of rows of memory cells in the DRAM chip is 214. The time taken to perform one refresh operation is 50 nanoseconds. The refresh period is 2 milliseconds. The percentage (rounded to the closet integer) of the time available for performing the memory read/write operations in the main memory unit is _______ .
Note – This was Numerical Type question.
(A) 59
(B) 40
(C) 99
(D) None of these
Answer: (A)
Explanation:
